Difference between revisions of "Programming over Fibre"

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Remote Firmware Update (RFU), aka Remote Configuration is the ability to reprogram the MCE via the fibre-optic interface.  This feature was implemented in February 2010.
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{{Related|Development Tools}}
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The procedure to update the [[MCE firmware]] over the fibre interface using a [[MAS]] PC, also known as "Remote Firmware Update", is described here.
  
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This page details the steps to enable the remote update ability.
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= Introduction =
  
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= Introduction =
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Each of the Address Card, Bias Cards, and Readout Cards of the MCE has an Altera Stratix FPGA along with a configuration device ([[MCE FPGA Types | See here]]). The Clock Card, however, has one FPGA with two configuration devices. FPGAs are RAM-based devices while configuration devices are Flash-based devices. Upon power up, each FPGA is loaded from its respective configuration device. The Clock Card FPGA is loaded from its factory configuration device upon power up, but then later, the firmware in the application configuration device can be loaded into the FPGA by issuing a command, i.e.:
  
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Each of the Address Card, Bias Card, and Readout Card of the MCE has an Altera Stratix FPGA along with a configuration device. Clock-Card, however, has one FPGA with two configuration devices. FPGAs are RAM-based devices while configuration devices are Flash-based devices. Upon power up, each FPGA is loaded from its respective configuration device. The Clock Card FPGA is loaded from its factory configuration device upon power up, but then later, the firmware in the application configuration device can be loaded into the FPGA by issuing a command, i.e., on mas PC: rs cc config_app 1.
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mce_cmd -x rs cc {{param|cc|config_app}}
  
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All these programmable parts with the exception of the factory configuration device are on a continous JTAG chain that can be controlled via the MCE front-panel connector with a USB-Blaster attached OR the Clock Card FPGA that runs the right firmware and is driven through the fibre interface.
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All these programmable parts, with the exception of the factory configuration device, are on a continuous JTAG chain that can be controlled via the MCE front-panel connector with an attached USB-Blaster, ''or'' via the Clock Card FPGA, provided it is running the right firmware, and is driven through the fibre interface.
  
 
The factory configuration device, however, is not on the same JTAG chain. It is only accessible through an on-board JTAG connector and can only be programmed with a USB-Blaster attached and Quartus Programmer.
 
The factory configuration device, however, is not on the same JTAG chain. It is only accessible through an on-board JTAG connector and can only be programmed with a USB-Blaster attached and Quartus Programmer.
  
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In order to load temporary firmware, an sof file can be loaded into the FPGA. This firmware will be gone upon power cycle. In order to load permanent firmware, a pof file (or a jic file depending on EPC16 or EPCS64) can be loaded.
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In order to load temporary firmware, an sof file can be loaded into the FPGA. This firmware will be lost upon power cycle. To load permanent firmware, a pof file (or a jic file depending on EPC16 or EPCS64) can be loaded.
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 +
= Remote Update: step by step =
 +
This can be done in 3 steps:
 +
# Scan JTAG chain
 +
# Generate JAM file
 +
# Update Firmware
 +
== Scan JTAG Chain ==
 +
 
 +
Run '''mce_auto_detect''':
 +
user@ubuntu:~$ mce_auto_detect
 +
mce_scan version 1
 +
card_scan
 +
#  card  card_id    card_type  pcb_rev    slot_id
 +
      2 0x124fb77        3        0        8
 +
      3 0x19c74de        2        0        4
 +
      4 0x1256aa5        2        0        5
 +
      7 0x19c0a93        1        6        1
 +
      8 0x19c3071        1        6        2
 +
      9 0x19c1455        1        6        3
 +
      10 0x19c6305        0        0        0
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jtag_scan
 +
# id device
 +
  1 EPC4/EPC8/EPC16
 +
  2 EP1S40
 +
  3 EPC4/EPC8/EPC16
 +
  4 EP1S40
 +
  5 EPC4/EPC8/EPC16
 +
  6 EP1S10
 +
  7 EPC4/EPC8/EPC16
 +
  8 EP1S10
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  9 EPC4/EPC8/EPC16
 +
  10 EP1S10
 +
  11 EPC4/EPC8/EPC16
 +
  12 EP1S10
 +
  13 EPC4/EPC8/EPC16
 +
 
 +
Note that the order of devices are cc (#1), rc2 (device #2, #3), rc1(#4, #5), bc3 (#6, #7), bc2(#8, #9), bc1(#10, #11), ac(#12, #13).
 +
 
 +
Device #1 refers to the Application configuration device on Clock Card.
 +
 
 +
If there are no devices listed below "jtag_scan", you probably have to flip a jumper on your clock card.  See the section below on [[ #Hardware Requirements ]].
  
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= Firmware Requirements =
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== Generate Jam File ==
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In order to be setup for remote firmware update, the Clock Card FPGA has to run firmware revision 5.0.7 or later. Considering that Clock Card FPGA can be loaded through one of Factory or Application configuration devices, at least one of those need to have 5.0.7+ firmware. If you are running Clock Card firmware prior to 5.0.7, which means your factory configuration device is loaded with prior to 5.0.7, then attach USB-Blaster to the MCE front-panel connector. Run Quaruts Programmer, click on auto-detect, and program the second part from the bottom of the list, EPC16, with Clock Card firmware 5.0.7+.pof.
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You need to update firmware on one device type at a time, i.e., EPC only, or FPGA only, or EPCS64 only.
  
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Then issue the following command:
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'''If you have access to internet:'''
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rs cc config_app 1
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# Go to MCE Firmware Canning Party webpage: http://e-mode.phas.ubc.ca/mcefcp/
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read back the firmware revision to make sure the 5.0.7+ is now active.  
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# copy and paste the result of mce_auto_detect on that webpage.
 +
# Choose the target device(s) you want to program and a drop down menu of available firmware revisions will appear.
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# Choose the firmware revision and click generate (find out which is the appropriate firmware version here: https://e-mode.phas.ubc.ca/mcewiki/index.php/MCE_firmware and download the firmware from here: https://e-mode.phas.ubc.ca/mce/firmware/).
 +
# Save the generated file somewhere on your mas PC.
 +
 
 +
'''If you do NOT have access to internet:'''
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# Install Quartus II Web Edition on Linux [[Quartus II Installation | See Instructions here]]
 +
# make a cdf file from the output of mce_auto_detect. Here is a sample cdf file [http://www.phas.ubc.ca/~mce/mcedocs/software/sample.cdf CDF]
 +
# generate a jam file by typing:
 +
  quartus_cpf -c <cdf_file_name> <jamfilename>
 +
 
 +
== Update Firmware==
 +
 
 +
Run '''mce_fw_update''':
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Usage:  /usr/mce/mce_script/script/mce_fw_update <device> <jamfilename>
 +
  device        one of:
 +
          FPGA:  for temporary firmware (sof)
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          EPC16:  for permanent firmware on any card other than RC Rev. E (pof)
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          EPCS64: for permanent firmware on RC Rev. E (jic)
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  jamfilename  either an absolute pathname, or a file in $MCE_JAM_DIR
  
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= Hardware Requirements =
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If you are programming FPGA parts (temporary firmware), this step takes seconds. However, it takes minutes to program permanent firmware into EPC16 or EPCS64 devices, e.g. '''13 minutes''' to program 2 rev F. Readout Cards.
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The buffer that controls whether the FPGA can drive the JTAG chain or not is controlled by BB_EN or SW1 dip switch setting on the Clock Card. Clock Cards shipped earlier do not have the right settings. You need to check this setting on your Clock Card. To do so, turn off the MCE power and unplug the Clock Card. The SW1.P1 labeled as "BB_EN" DIP should be on OPEN position.  
 
  
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* Note that with this DIP switch setting, you can not program the FPGA(sof) from the front panel connector (USB_Blaster) anymore.
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If the programming fails, you might need to mess with the programming frequencies.  These are passed to mce_jam via the -f flag, as frequencies in Hz. See the mce_fw_update script, and try decreasing the frequency by a factor of 10.
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* With this DIP switch setting, if CC firmware is pre-5.0.7, you can not access the JTAG chain from the front panel connector (USB_Blaster) anymore. Assuming you have 5.0.7+ in your configuration device, you need to issue: rs cc config_app 1 to be able to access front-panel JTAG.
 
  
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= Remote Configuration Software =
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Note that when programming permanent firmware, the fw_rev will not immediately be updated. The new firmware will not be loaded until the card is power cycled.
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Make sure '''mce_jam''' is installed. This is normally installed under /usr/mce/bin. If not, then you need to update your mas and mce_jam will be automatically installed. If you rather not upgrade mas, then just checkout the code under mas/applications/mce_jam, make it and copy it to the mas install directory.
 
  
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The read_idcode.jam file is included in SVN as a test script to help you determine whether you have set up the system correctly.
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= Troubleshooting Remote Update =
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mce_jam -u -v -f8000000 -aread_idcode read_idcode.jam                    // For Querying ID Codes
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== Software Requirements ==
 +
Make sure the following are installed. 
 +
From the MAS repository:
 +
* mce_jam : This will be installed under /usr/mce/bin/.
 +
From the MCE script repository (trunk):
 +
* read_idcode.jam : This should be in $MAS_TEMPLATE directory.
 +
* $MCE_JAM_DIR is set : This is set through mas_env.bash.
 +
* mce_auto_detect (in mce_script directory)
 +
* mce_fw_update (in mce_script directory)
 +
== Firmware Requirements ==
 +
The Clock Card FPGA has to run firmware revision 5.0.7 or later. Considering that Clock Card FPGA can be loaded through either the Factory or Application configuration devices, at least one of these need to have 5.0.7+ firmware. If you are running Clock Card firmware prior to 5.0.7, which means your factory configuration device is loaded with firmware prior to 5.0.7, then attach USB-Blaster to the MCE front-panel connector. Run Quaruts Programmer, click on auto-detect, and program the second part from the bottom of the list, EPC16, with Clock Card firmware 5.0.7+.pof.
  
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If you can run the read_idcode script, then you are ready to re-configure FPGA's, EPC16's and EPCS64's.  For these devices, you will need to generate .jam files that are specifically suited to your JTAG chain's topology.  You will need Quartus II software to do this.  Instructions on generating .jam files are here: [[MCE Programming File Conversions]].  If you do not have access to Quartus II software, send the output of the read_idcode.jam script to UBC, and configuration .jam files can be generated for you.
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Then issue the following command:
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mce_jam -u -v -f800000 -aprogram -dDO_VERIFY=0 cc_xfpga_rc_pof.jam        // For Programming EPC16's
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mce_cmd -x rs cc {{param|cc|config_app}}
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mce_jam -u -v -f8000000 -aconfigure cc_xfpga_rc_sof.jam                  // For Configuring FPGA's
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to switch to the new firmware.  (Read back the firmware revision to make sure the new firmware is now active.)
  
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Note that programming an EPCS64 is a two-step process:
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== Hardware Requirements ==
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mce_jam -u -v -f8000000 -aconfigure cc_rcd_jic.jam                        // For Programming EPCS64's (Step 1 of 2)
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The buffer that controls whether the FPGA can drive the JTAG chain or not is controlled by BB_EN or SW1 dip switch setting on the Clock Card. Clock Cards shipped earlier than Dec. 2010, do not have the right settings. To check this setting on your Clock Card, turn off the MCE power and unplug the Clock Card. The SW1.P1 labeled as "BB_EN" DIP should be on OPEN position.
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mce_jam -u -v -f100000 -aprogram -dDO_VERIFY=0 cc_rcd_jic.jam            // For Programming EPCS64's (Step 2 of 2)
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 +
* Note that with DIP switch SW1.P1 set to OPEN, you can not program the FPGA(sof) from the front panel connector (USB_Blaster) anymore.
 +
* With DIP switch set to OPEN, if CC firmware is pre-5.0.7, you can not access the JTAG chain from the front panel connector (USB_Blaster) anymore. Assuming you have 5.0.7+ in your configuration device, you need to issue: <code>mce_cmd -x rs cc config_app 1</code> to be able to access front-panel JTAG.
  
 
= Footnotes =
 
= Footnotes =
−
== Generating .JAM Files for Remote Update ==
 
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* [[ Generating .JAM Files For Remote Update ]] (automated)
 
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* [[MCE Programming File Conversions]] (manual)
 
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== Porting Remote Configuration Sofware to DAS ==
 
== Porting Remote Configuration Sofware to DAS ==
 
The following C-code will need to be ported to DAS to enable Remote Configuration.  You will need to convert the MCE WB and RB commands in the code to use DAS libraries and compile the code with the included Makefile:   
 
The following C-code will need to be ported to DAS to enable Remote Configuration.  You will need to convert the MCE WB and RB commands in the code to use DAS libraries and compile the code with the included Makefile:   
Line 52: Line 118:
  
 
== Development Notes ==
 
== Development Notes ==
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* http://e-mode.phas.ubc.ca/intmcewiki/index.php/Remote_Firmware_Update
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* [[intmce:Remote Firmware Update]]
 +
 
 +
[[Category:Firmware]]
 +
[[Category:MAS]]
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[[Category:MCE Script]]
 +
[[Category:Development Tools]]

Latest revision as of 17:23, 3 December 2021

The procedure to update the MCE firmware over the fibre interface using a MAS PC, also known as "Remote Firmware Update", is described here.

Introduction

Each of the Address Card, Bias Cards, and Readout Cards of the MCE has an Altera Stratix FPGA along with a configuration device ( See here). The Clock Card, however, has one FPGA with two configuration devices. FPGAs are RAM-based devices while configuration devices are Flash-based devices. Upon power up, each FPGA is loaded from its respective configuration device. The Clock Card FPGA is loaded from its factory configuration device upon power up, but then later, the firmware in the application configuration device can be loaded into the FPGA by issuing a command, i.e.: 

mce_cmd -x rs cc config_app

All these programmable parts, with the exception of the factory configuration device, are on a continuous JTAG chain that can be controlled via the MCE front-panel connector with an attached USB-Blaster, or via the Clock Card FPGA, provided it is running the right firmware, and is driven through the fibre interface.

The factory configuration device, however, is not on the same JTAG chain. It is only accessible through an on-board JTAG connector and can only be programmed with a USB-Blaster attached and Quartus Programmer.

In order to load temporary firmware, an sof file can be loaded into the FPGA. This firmware will be lost upon power cycle. To load permanent firmware, a pof file (or a jic file depending on EPC16 or EPCS64) can be loaded.

Remote Update: step by step

This can be done in 3 steps:

  1. Scan JTAG chain
  2. Generate JAM file
  3. Update Firmware

Scan JTAG Chain

Run mce_auto_detect: 

user@ubuntu:~$ mce_auto_detect
mce_scan version 1
card_scan
#   card  card_id    card_type  pcb_rev    slot_id
      2 0x124fb77         3         0         8
      3 0x19c74de         2         0         4
      4 0x1256aa5         2         0         5
      7 0x19c0a93         1         6         1
      8 0x19c3071         1         6         2
      9 0x19c1455         1         6         3
     10 0x19c6305         0         0         0
jtag_scan
# id device
  1 EPC4/EPC8/EPC16
  2 EP1S40
  3 EPC4/EPC8/EPC16
  4 EP1S40
  5 EPC4/EPC8/EPC16
  6 EP1S10
  7 EPC4/EPC8/EPC16
  8 EP1S10
  9 EPC4/EPC8/EPC16
  10 EP1S10
  11 EPC4/EPC8/EPC16
  12 EP1S10
  13 EPC4/EPC8/EPC16

Note that the order of devices are cc (#1), rc2 (device #2, #3), rc1(#4, #5), bc3 (#6, #7), bc2(#8, #9), bc1(#10, #11), ac(#12, #13).

Device #1 refers to the Application configuration device on Clock Card.

If there are no devices listed below "jtag_scan", you probably have to flip a jumper on your clock card. See the section below on #Hardware Requirements .

Generate Jam File

You need to update firmware on one device type at a time, i.e., EPC only, or FPGA only, or EPCS64 only.

If you have access to internet:

  1. Go to MCE Firmware Canning Party webpage: http://e-mode.phas.ubc.ca/mcefcp/
  2. copy and paste the result of mce_auto_detect on that webpage.
  3. Choose the target device(s) you want to program and a drop down menu of available firmware revisions will appear.
  4. Choose the firmware revision and click generate (find out which is the appropriate firmware version here: https://e-mode.phas.ubc.ca/mcewiki/index.php/MCE_firmware and download the firmware from here: https://e-mode.phas.ubc.ca/mce/firmware/).
  5. Save the generated file somewhere on your mas PC.

If you do NOT have access to internet:

  1. Install Quartus II Web Edition on Linux See Instructions here
  2. make a cdf file from the output of mce_auto_detect. Here is a sample cdf file CDF
  3. generate a jam file by typing:
 quartus_cpf -c <cdf_file_name> <jamfilename>

Update Firmware

Run mce_fw_update: 

Usage:   /usr/mce/mce_script/script/mce_fw_update <device> <jamfilename> 
  device        one of:
          FPGA:   for temporary firmware (sof)
          EPC16:  for permanent firmware on any card other than RC Rev. E (pof)
          EPCS64: for permanent firmware on RC Rev. E (jic)
  jamfilename   either an absolute pathname, or a file in $MCE_JAM_DIR

If you are programming FPGA parts (temporary firmware), this step takes seconds. However, it takes minutes to program permanent firmware into EPC16 or EPCS64 devices, e.g. 13 minutes to program 2 rev F. Readout Cards.

If the programming fails, you might need to mess with the programming frequencies. These are passed to mce_jam via the -f flag, as frequencies in Hz. See the mce_fw_update script, and try decreasing the frequency by a factor of 10.

Note that when programming permanent firmware, the fw_rev will not immediately be updated. The new firmware will not be loaded until the card is power cycled.

Troubleshooting Remote Update

Software Requirements

Make sure the following are installed. From the MAS repository:

  • mce_jam : This will be installed under /usr/mce/bin/.

From the MCE script repository (trunk):

  • read_idcode.jam : This should be in $MAS_TEMPLATE directory.
  • $MCE_JAM_DIR is set : This is set through mas_env.bash.
  • mce_auto_detect (in mce_script directory)
  • mce_fw_update (in mce_script directory)

Firmware Requirements

The Clock Card FPGA has to run firmware revision 5.0.7 or later. Considering that Clock Card FPGA can be loaded through either the Factory or Application configuration devices, at least one of these need to have 5.0.7+ firmware. If you are running Clock Card firmware prior to 5.0.7, which means your factory configuration device is loaded with firmware prior to 5.0.7, then attach USB-Blaster to the MCE front-panel connector. Run Quaruts Programmer, click on auto-detect, and program the second part from the bottom of the list, EPC16, with Clock Card firmware 5.0.7+.pof.

Then issue the following command: 

mce_cmd -x rs cc config_app

to switch to the new firmware. (Read back the firmware revision to make sure the new firmware is now active.)

Hardware Requirements

The buffer that controls whether the FPGA can drive the JTAG chain or not is controlled by BB_EN or SW1 dip switch setting on the Clock Card. Clock Cards shipped earlier than Dec. 2010, do not have the right settings. To check this setting on your Clock Card, turn off the MCE power and unplug the Clock Card. The SW1.P1 labeled as "BB_EN" DIP should be on OPEN position.

  • Note that with DIP switch SW1.P1 set to OPEN, you can not program the FPGA(sof) from the front panel connector (USB_Blaster) anymore.
  • With DIP switch set to OPEN, if CC firmware is pre-5.0.7, you can not access the JTAG chain from the front panel connector (USB_Blaster) anymore. Assuming you have 5.0.7+ in your configuration device, you need to issue: mce_cmd -x rs cc config_app 1 to be able to access front-panel JTAG.

Footnotes

Porting Remote Configuration Sofware to DAS

The following C-code will need to be ported to DAS to enable Remote Configuration. You will need to convert the MCE WB and RB commands in the code to use DAS libraries and compile the code with the included Makefile:

Development Notes

Retrieved from "https://e-mode.phas.ubc.ca/mcewiki/index.php?title=Programming_over_Fibre&oldid=7144"