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| − | = Testing MCE Readout Cards =
| + | * [[ Testing Readout Cards ]] |
| − | == Setup ==
| + | * [[ Testing Bias Cards ]] |
| − | The following equipments are needed:
| + | * [[ Testing Address Cards ]] |
| − | * mas PC: An ubuntu-based PC with ARC-64 PCI card installed an running mas software. | + | * [[ Testing Clock Cards]] |
| − | * 2-slot backplane with Clock Card plugged in: Device under test (DUT) is plugged into this backplane during testing. | + | * [[ Testing Bus Backplane]] |
| − | * fibre-optic cable: connects mas-PC to Clock Card. | + | * [[ Testing VPA ]] |
| − | * set of Linear supplies to power up the cards. (3V, 4.5V, 6.2V, -6.2V) | + | == Test Accessories == |
| − | * Altera USB programmer: attached to the JTAG connector in Clock card front panel.
| + | * [[ 2-slot Backplane ]] |
| − | * PC with Quartus installed: used to program FPGA and configuration devices on Readout Card.
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| − | * Oscilloscope | |
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| − | If you have all the above and '''if your DUT has already been smoke tested''', you are ready to start:
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| − | # connect them up an power up the 2-slot backplane.
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| − | # Load FPGA firmware using Quartus. Firmware is located at [[www.phas.ubc.ca/~mce/mcedocs/firmware]]. Run auto-detect and you should see 3 to 4 devices depending on the revision of the card you are testing. The part at the bottom of the list corresponts to Clock card FPGA. Load following firmware from the above directory: '''CC firmware 5.0.7''', '''RC firmware rc_stratix3_5.0.6_jan11_2010'''
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| − | # On the 2-slot backplane there are two sets of dip switches. You need to set the one on the Readout card side to 1011 (0xB), otherwise rc1 replies do not come back, because the card is not identified properly.
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| − | # Now make sure both cards communicate with the PC. ssh to the PC running mas and connected to the 2-slot backplane trhough fibre cables and run the following command:
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| − | mce_cmd -x rb cc fw_rev
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| − | | |
| − | and you will see:
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| − | Line 0 : ok : 0x5000007
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| − | | |
| − | and then type:
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| − | mce_cmd -x rb rc1 fw_rev
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| − | and you will see
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| − | Line 0 : ok : 0xffff0006
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| − | | |
| − | == Testing general features == | |
| − | run card_all_test: Output should look like:
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| − | | |
| − | == Testing DACS (sa_bias, offset, sq1fb DACS) ==
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| − | In this stage, DACs are loaded with sets of fix values (0, mid-range, full-range) and then a ramp is applied and outputs are probed in all cases. Type:
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| − | run rc_test
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| − | == Testing Serial Configuration device and FPGA reconfiguration ==
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| − | Load firmware into the serial configuration device as oppose to the FPGA now. The serial configuration device is programmed through the FPGA by loading a jic file. Here are the steps:
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| − | * Run Quartus programmer and click on auto-detect. You should see 3 devices in the list. | |
| − | * Select ep3s50 device and click on change file to choose '''rc_stratix3_v05000006_nnxxx2010.jic''' (found in www.phas.ubc.ca/~mce/mcedocs/firmware)
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| − | * When you choose the jic file, you will see that now an entry is added to the list. The serial configuration device has no direct jitag access and is only accessible through the FPGA and hence it is shown as dotted lines connected to the ep3s50.
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| − | * Now select both devices (the two on top) and click on program.
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| − | * When programming is done, turn off the power and turn it back on. If the Green Light is on, it means that you have successfully programmed the serial device.
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| − | * on mas prompt, type: mce_cmd -x rb rc1 fw_rev and you should see the firmware revision of the firmware you loaded. This is usually noted in the filename of the file you chose.
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| − | | |
| − | Record the result in logfile.
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| − | | |
| − | == Preamp and ADC Step-Response Test==
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| − | This test routes the outputs of each preamp chain and ADC to the equivalent Feedback-DAC for a fast check on preamp chain and ADC operation, and preamp rise/fall-times and overshoot.
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| − | | |
| − | Firmware: rc_noise_response_test_24apr2006.sof
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| − | | |
| − | Equipment: HP3312A Function Generator,
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| − | special 50 ohm terminated test cable,
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| − | TDS3034B or TDS3054B oscilloscope.
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| − | | |
| − | Set the scope Measure functions to display frequency, rise-time, fall-time, and amplitude.
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| − | Adjust the function generator for a square wave output at a frequency of about 800kHz, with the amplitude about mid scale on the lowest range [.01]. Connect the function generator to the preamp channel input pins on the 2SlotBP header and monitor the feedback DAC output on the 2SlotBP header with a scope. Adjust the signal amplitude and offset to about 0.5 volts p-p, centered in the DAC output range.
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| − | Note: the function generator offset control does not have enough range, when using the 50 ohm terminated test cable, to adjust the offset so that the top of the square wave above about 0.7 to 0.8 volts [as viewed at the FBDAC output]. If you want to test the full range of the ADC-FBDAC combo, use the unterminated test cable.
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| − | | |
| − | For each preamp chain in turn connect the signal generator and check the DAC output as above. Using Internet Explorer, open the scope URL, and save the scope output as a xxx.bmp file. Log the file name, as a record of signal chain and DAC functioning. Also log any anomalies seen.
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| − | Note: if you want to do a noise FFT on the output data, use a shorting or 49R9 jumper-terminator instead of the signal generator. The scope output can be saved as an xxx.isf file, which can then be read by ‘power_spectrum.sav’, an IDL program. [There is a shortcut icon for this program at the top of the TestBench PC monitor].
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| − | | |
| − | == Channel Noise Histogram Test ==
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| − | | |
| − | log results
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