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| − | = Testing MCE Readout Cards =
| + | * [[ Testing Readout Cards ]] |
| − | == Setup ==
| + | * [[ Testing Bias Cards ]] |
| − | * mas PC: An ubuntu-based PC with ARC-64 PCI card installed an running mas software. | + | * [[ Testing Address Cards ]] |
| − | * 2-slot backplane with Clock Card plugged in: Device under test (DUT) is plugged into this backplane during testing. | + | * [[ Testing Clock Cards]] |
| − | * set of Linear supplies to power up the cards. (3V, 4.5V, 6.2V, -6.2V) | + | * [[ Testing Bus Backplane]] |
| − | * Altera USB programmer: attached to the JTAG connector in Clock card front panel.
| + | * [[ Testing VPA ]] |
| − | * PC with Quartus installed: used to program FPGA and configuration devices on Readout Card. | + | == Test Accessories == |
| − | | + | * [[ 2-slot Backplane ]] |
| − | If you have all the above and if your DUT has already been smoke tested, you are ready to start:
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| − | # connect them up an power up the 2-slot backplane.
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| − | # Load FPGA firmware using Quartus. Firmware is located at [[www.phas.ubc.ca/~mce/mcedocs/firmware]]. When you run auto-detect, you should see 3 to 4 devices depending on the revision of the card you are testing. The part at the bottom of the list corresponts to Clock card FPGA. Load following firmware from the above directory:
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| − | | |
| − | CC firmware 5.0.7
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| − | RC firmware rc_stratix3_5.0.6_jan11_2010
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| − | | |
| − | # On the 2-slot backplane there are two sets of dip switches. You need to set the one on the Readout card side to 1011 (0xB), otherwise rc1 replies do not come back, because the card is not identified properly.
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| − | | |
| − | # Now make sure both cards communicate with the PC. ssh to the PC running mas and connected to the 2-slot backplane trhough fibre cables and run the following command:
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| − | mce_cmd -x rb cc fw_rev
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| − | | |
| − | and you will see:
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| − | Line 0 : ok : 0x5000007
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| − | | |
| − | and then type:
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| − | mce_cmd -x rb rc1 fw_rev
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| − | and you will see
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| − | Line 0 : ok : 0xffff0006
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| − | | |
| − | == 1. Testing general features == | |
| − | run card_all_test
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| − | | |
| − | == 2. Testing DACS (sa_bias, offset, sq1fb DACS) ==
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| − | In this stage, DACs are loaded with sets of fix values (0, mid-range, full-range) and then a ramp is applied and outputs are probed in all cases. Type:
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| − | run rc_test
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| − | | |
| − | log results
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