Difference between revisions of "Arbitrary Waveform Generator"

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Determining the complex impedance of SQUIDS is difficult to do, because it requires overlaying a pattern on top a normal bias value to help differentiate between optical noise and electrical noise.
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For running simple parameter ramps on the MCE using internal commanding, see [[ Ramp Generator ]].
  
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= Commands and Usage =
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* The Arbitrary Waveform Generator (AWG) permits users to configure a sequence of values which will be written at regular intervals to some MCE register.  The AWG is an MCE firmware feature.
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In an effort to determine the complex impedance, the following commands have been implemented.
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* A RAM block has been allocated in the Clock Card FPGA to store arbitrary waveform values.
 +
* Commands have been implemented to read to and write from the RAM (awg_data, awg_addr). 
 +
* A FSM has been implemented that can apply a set number of values (awg_sequence_length) from the RAM block to any internal register (ramp_card_addr, ramp_param_id, ramp_step_data_num) in the MCE at a certain rate (ramp_step_period).
  
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* Commands:
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= Script-level support: mce_awg =
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** '''internal_cmd_mode (0xB0):'''  Enable or disable internal housekeeping/ ramping commands.  Default = 0.
 
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*** mode = 0:  Disable internal commands
 
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*** mode = 1:  Enable Housekeeping commands
 
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*** mode = 2: Enable ramp commands
 
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*** mode = 3: Enable arbitrary waveform (AWG) commands
 
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** '''awg_sequence_len:'''  Specify the length of the AWG sequence that is loaded in RAM.  This parameter tells the internal commanding FSM how long the AWG sequence is, and at what index it should restart AWG the sequence.
 
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** '''awg_data:'''  Load the AWG sequence into RAM on the Clock Card.  The RAM has 8192 indexes.  This may be expanded later if there are enough resources still available on the Clock Card.
 
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** '''awg_addr:'''  Specify the starting address for reading from or writing to the AWG RAM.  This parameter does not affect the memory address of the internal commanding FSM.
 
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** '''ramp_step_period:'''  (also used for internal ramps)  Specify the number of frame periods between each ramp step.
 
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** '''ramp_param_id:'''  (also used for internal ramps)  Specify the parameter ID of the register to be ramped.
 
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** '''ramp_card_addr:'''  (also used for internal ramps)  Specify the card address of the register to be ramped. 
 
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** '''ramp_step_data_num:'''  (also used for internal ramps)  Specify the number of data that are to be written per ramp command.
 
  
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* Usage:
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The script '''<tt>mce_awg</tt>''', in combination with <tt>[[mce_internal_ramp]]</tt>, may be used to control the AWG features of the MCE.
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  wb cc internal_cmd_mode 3    //Enable internal AWG commands
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* mce_awg is used to load the AWG data into CC RAM, and to start and stop the AWG loop.
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  wb cc ramp_step_period 10    //This number will most likely match the data_rate, below
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* mce_internal_ramp is used to set the timing parameters and the target register for the AWG loop.
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  wb cc ramp_param_id 153      //LED, for example
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  wb cc ramp_card_addr 2      //Clock Card, for example
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== Example ==
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  wb cc ramp_step_data_num 1
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  wb cc awg_sequence_len 8192  //Currently the maximum size of the AWG RAM block
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The following commands will load a triangle wave into a 400 sample buffer, and try to run it with 50 Hz updating (so an 1/8 Hz repeat frequency) on tes bias[0]:
 +
 
 +
mce_awg stop
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mce_internal_ramp setup --target tes bias --count=1 --range 0 0 1 --step-frequency=50.
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mce_awg setup --triangle 8000 100 --count 400
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mce_awg start
 +
 
 +
== Disabling the AWG loop ==
 +
 
 +
To disable the AWG, run either of
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mce_awg stop
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mce_internal_ramp stop
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 +
== Setting timing parameters and target register ==
 +
 
 +
The timing parameters and target register are set using mce_internal_ramp. See [[mce_internal_ramp]], or run <tt>mce_internal_ramp -h</tt> for more details.
 +
mce_internal_ramp --stage=sa_bias --count=8 --offset 8 --step-frequency 100  --range 0 0 1  setup
 +
 
 +
Note that the <tt>--range</tt> option is a dummy parameter here, as it is our intention to run an AWG loop, not an internal ramp.
 +
 
 +
== Loading a waveform ==
 +
 
 +
The waveform may be taken from an ascii file, read from stdin, or generated automatically.  Examples:
 +
 
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From a file:
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mce_awg setup --filename my_weird_wave.txt
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From stdin:
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cat my_weird_wave.txt | mce_awg setup --stdin
 +
 
 +
(For multi-column ascii data, from either a file or stdin, pass --column=<int> to specify the source column.  In both cases, blank lines and lines beginning with a # are ignored.)
 +
 
 +
A sine wave with a period of 400 steps, amplitude 1000 and offset 20000
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mce_awg setup --sine 20000 1000 --count 400
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 +
A triangle wave with a period of 8192 (max, default), from 1500 to 2500 and back again:
 +
mce_awg setup --triangle 2000 500
 +
 
 +
== Starting the AWG loop ==
 +
 
 +
mce_awg start
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 +
 
 +
= Targeting TES and heater biases with mod_val =
 +
 
 +
 
 +
 
 +
= Low-Level MCE Parameters for AWG =
 +
 
 +
If you are writing your own script, the following MCE parameters need to be set:
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* {{param|cc|internal_cmd_mode}}, {{param|cc|awg_sequence_length}}, {{param|cc|awg_addr}}, {{param|cc|ramp_step_period}}, {{param|cc|ramp_param_id}}, {{param|cc|ramp_card_addr}}, {{param|cc|ramp_step_data_num}}, {{param|cc|ramp_step_phase}} (optional).
 +
 
 +
* Refer to [[MCE commands]] for details.
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* Refer to [[MCE Timing Diagram#Timing_of_Internal_command|Timing of Internal Commands]].
 +
 
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Example:
 +
  wb cc {{param|cc|ramp_step_period}} 10     
 +
  wb cc {{param|cc|ramp_param_id}} 153      //LED, for example
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  wb cc {{param|cc|ramp_card_addr}} 2      //Clock Card, for example
 +
  wb cc {{param|cc|ramp_step_data_num}} 1
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  wb cc {{param|cc|awg_sequence_length}} 8192  //Currently the maximum size of the AWG RAM block
 
   
 
   
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  wb cc awg_addr 0            //Set the AWG RAM address to zero before writing new values
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  wb cc {{param|cc|internal_cmd_mode}} 0    //Disable internal AWG commands BEFORE writing the data!!!
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  wb cc awg_data 1 2 1 2 ...  //Write AWG values
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wb cc {{param|cc|awg_addr}} 0            //Set the AWG RAM address to zero before writing new values
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  wb cc awg_data 1 2 1 2 ...  //Write more AWG values, appended to the end of the first set of values
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  wb cc {{param|cc|awg_data}} 1 2 1 2 ...  //Write AWG values
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  wb cc {{param|cc|awg_data}} 1 2 1 2 ...  //Write more AWG values, appended to the end of the first set of values
 
  ...
 
  ...
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  wb cc awg_data 1 2 1 2 ...  //Write the last few AWG values, which must number as many as specified by awg_sequence_len above
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  wb cc {{param|cc|awg_data}} 1 2 1 2 ...  //Write the last few AWG values, which must number as many as specified by awg_sequence_length above
 
   
 
   
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  wb cc data_rate 10
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  wb cc {{param|cc|awg_addr}} 0            //Set the AWG RAM address to zero before reading values
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  wb cc ret_dat_s 1 1000
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rb cc {{param|cc|awg_data}}              //Read AWG values
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  go cc ret_dat 1
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rb cc {{param|cc|awg_data}} 
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...
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rb cc {{param|cc|awg_data}}
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wb cc {{param|cc|awg_addr}} 0            //Set the AWG RAM address to zero before changing the internal command mode
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  wb cc {{param|cc|internal_cmd_mode}} 3    //Enable internal AWG commands AFTER writing the data!!!
 +
 +
  wb cc {{param|cc|data_rate}} 10
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acq_config awg_test rcs
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acq_go 1000
 +
 
 +
*Note 1: The awg_addr register and awg_data are readable when internal-commanding is turned off.
 +
*Note 2: You need to set awg_addr to 0 to read the awg_data sequence in full.
  
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= Firmware Details =
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[[Category:Clock Card Firmware]]
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* Synthesis:
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[[Category:MCE Script]]
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** At this point in time (13 Jan 2009), the feature has not been tested in hardware.  However, the simulations look clean
 
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* Implementation:
 
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** To enable the AWG internal commands, you set '''internal_cmd_mode''' = 3, as shown in the usage, above.
 
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** When writing to the AWG block using the '''awg_data''' command, the AWG address pointer is incremented for every new value written, and the address pointer is not reset following the WB transaction, so that the next WB writes to the next available index in the RAM.  Thus, once a series of awg_data commands have been issued to specify an entire AWG sequence, the address pointer must be set to zero manually if you wish to read back the entire sequence.
 
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** The '''awg_addr''' command determines the index accessed by awg_data commands, and by the internal AWG commanding state machine. 
 
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** The '''awg_sequence_len''' command specifies the length of the AWG sequence stored in the AWG RAM.  The internal AWG commanding FSM uses this parameter to determine when to wrap back to the first index of the RAM. When '''internal_cmd_mode''' is set to 3, the state machine begins issuing commands from awg_addr.  The internal state machine assumes that the AWG begins at index zero of the AWG RAM, and ends at index awg_sequence_len-1.  When the index reaches awg_sequence_len-1, it wraps to zero.  In contrast,  awg_data commands can access indexes past awg_sequence_len-1, if you read/write further.
 
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** The AWG value is applied immediately following a data packet, and appears in index 7 of the next data-packet header.  This index is called "Ramp Value", and is also used to report the ramp value when the MCE is in internal ramp mode (internal_cmd_mode = 2)
 
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** The AWG commands detailed above are implemented in the Clock Card cc_v05000003_02dec2009 firmware tag available in CVS.
 
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** The awg_addr register and awg_data RAM are readable, but you should not read them while the Clock Card is applying an arbitrary waveform (internal_command_mode = 3) otherwise you’ll screw up the values that the internal FSM applies.
 

Latest revision as of 12:41, 23 June 2017

For running simple parameter ramps on the MCE using internal commanding, see Ramp Generator .

  • The Arbitrary Waveform Generator (AWG) permits users to configure a sequence of values which will be written at regular intervals to some MCE register. The AWG is an MCE firmware feature.
  • A RAM block has been allocated in the Clock Card FPGA to store arbitrary waveform values.
  • Commands have been implemented to read to and write from the RAM (awg_data, awg_addr).
  • A FSM has been implemented that can apply a set number of values (awg_sequence_length) from the RAM block to any internal register (ramp_card_addr, ramp_param_id, ramp_step_data_num) in the MCE at a certain rate (ramp_step_period).

Script-level support: mce_awg

The script mce_awg, in combination with mce_internal_ramp, may be used to control the AWG features of the MCE.

  • mce_awg is used to load the AWG data into CC RAM, and to start and stop the AWG loop.
  • mce_internal_ramp is used to set the timing parameters and the target register for the AWG loop.

Example

The following commands will load a triangle wave into a 400 sample buffer, and try to run it with 50 Hz updating (so an 1/8 Hz repeat frequency) on tes bias[0]: 

mce_awg stop
mce_internal_ramp setup --target tes bias --count=1 --range 0 0 1 --step-frequency=50.
mce_awg setup --triangle 8000 100 --count 400
mce_awg start

Disabling the AWG loop

To disable the AWG, run either of 

mce_awg stop
mce_internal_ramp stop

Setting timing parameters and target register

The timing parameters and target register are set using mce_internal_ramp. See mce_internal_ramp, or run mce_internal_ramp -h for more details. 

mce_internal_ramp --stage=sa_bias --count=8 --offset 8 --step-frequency 100  --range 0 0 1  setup

Note that the --range option is a dummy parameter here, as it is our intention to run an AWG loop, not an internal ramp.

Loading a waveform

The waveform may be taken from an ascii file, read from stdin, or generated automatically. Examples:

From a file: 

mce_awg setup --filename my_weird_wave.txt

From stdin: 

cat my_weird_wave.txt | mce_awg setup --stdin

(For multi-column ascii data, from either a file or stdin, pass --column=<int> to specify the source column. In both cases, blank lines and lines beginning with a # are ignored.)

A sine wave with a period of 400 steps, amplitude 1000 and offset 20000 

mce_awg setup --sine 20000 1000 --count 400

A triangle wave with a period of 8192 (max, default), from 1500 to 2500 and back again: 

mce_awg setup --triangle 2000 500

Starting the AWG loop

mce_awg start


Targeting TES and heater biases with mod_val

Low-Level MCE Parameters for AWG

If you are writing your own script, the following MCE parameters need to be set:

Example: 

wb cc ramp_step_period 10    
wb cc ramp_param_id 153      //LED, for example
wb cc ramp_card_addr 2       //Clock Card, for example
wb cc ramp_step_data_num 1
wb cc awg_sequence_length 8192  //Currently the maximum size of the AWG RAM block

wb cc internal_cmd_mode 0    //Disable internal AWG commands BEFORE writing the data!!!
wb cc awg_addr 0             //Set the AWG RAM address to zero before writing new values
wb cc awg_data 1 2 1 2 ...   //Write AWG values
wb cc awg_data 1 2 1 2 ...   //Write more AWG values, appended to the end of the first set of values
...
wb cc awg_data 1 2 1 2 ...   //Write the last few AWG values, which must number as many as specified by awg_sequence_length above

wb cc awg_addr 0             //Set the AWG RAM address to zero before reading values
rb cc awg_data               //Read AWG values
rb cc awg_data   
...
rb cc awg_data

wb cc awg_addr 0             //Set the AWG RAM address to zero before changing the internal command mode
wb cc internal_cmd_mode 3    //Enable internal AWG commands AFTER writing the data!!!

wb cc data_rate 10
acq_config awg_test rcs
acq_go 1000
  • Note 1: The awg_addr register and awg_data are readable when internal-commanding is turned off.
  • Note 2: You need to set awg_addr to 0 to read the awg_data sequence in full.
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