Difference between revisions of "Readout Card"
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The Read-out Card (RC) of the the Multi-Channel Electronics (MCE) provides the readout circuitry from an array of detectors based on transition-edge sensor (TES) bolometers and SQUID amplifiers. An RC has 8 readout channels that each controls a column of the array of detectors. Each readout circuitry consists of a preamp stage followed by a 14-bit 50MS/s video analog-to-digital converter (ADC) to sample an input signal, a 14-bit DAC to output the calculated SQ1 feedback, two 16-bit serial DACs to output the series-array (SA) bias and cable offset, respectively. The on-board FPGA firmware provides digital filtering of the signal. The input signal, the calculated feedback, the low-pass filtered feedback signal, or a combination of these data, are transmitted over the MCE backplane (2 point-to-point LVDS lines) to the clock-card (CC) where they are rearranged and transmitted to the PC that controls the MCE. | The Read-out Card (RC) of the the Multi-Channel Electronics (MCE) provides the readout circuitry from an array of detectors based on transition-edge sensor (TES) bolometers and SQUID amplifiers. An RC has 8 readout channels that each controls a column of the array of detectors. Each readout circuitry consists of a preamp stage followed by a 14-bit 50MS/s video analog-to-digital converter (ADC) to sample an input signal, a 14-bit DAC to output the calculated SQ1 feedback, two 16-bit serial DACs to output the series-array (SA) bias and cable offset, respectively. The on-board FPGA firmware provides digital filtering of the signal. The input signal, the calculated feedback, the low-pass filtered feedback signal, or a combination of these data, are transmitted over the MCE backplane (2 point-to-point LVDS lines) to the clock-card (CC) where they are rearranged and transmitted to the PC that controls the MCE. | ||
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# filter the result, | # filter the result, | ||
# apply the necessary (non-filtered) first-stage feedback | # apply the necessary (non-filtered) first-stage feedback | ||
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| + | For implementation details, see: [[http://www.phas.ubc.ca/%7Emce/mcedocs/hardware/tech_description/SC2_ELE_S582_501_readout_card_description.pdf Technical Description in PDF]] | ||
== Other Documentation == | == Other Documentation == | ||
| − | * Technical description [[http://www.phas.ubc.ca/%7Emce/mcedocs/hardware/tech_description/SC2_ELE_S582_501_readout_card_description.pdf PDF]] | + | * Technical description [[http://www.phas.ubc.ca/%7Emce/mcedocs/hardware/tech_description/SC2_ELE_S582_501_readout_card_description.pdf PDF]] |
* [[Readout Card firmware]] | * [[Readout Card firmware]] | ||
* [[MCE commands#Readout card commands|Readout Card commands]] | * [[MCE commands#Readout card commands|Readout Card commands]] | ||
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| − | [[Category: | + | [[Category:Readout Card| ]] |
Latest revision as of 11:31, 11 October 2022
The Read-out Card (RC) of the the Multi-Channel Electronics (MCE) provides the readout circuitry from an array of detectors based on transition-edge sensor (TES) bolometers and SQUID amplifiers. An RC has 8 readout channels that each controls a column of the array of detectors. Each readout circuitry consists of a preamp stage followed by a 14-bit 50MS/s video analog-to-digital converter (ADC) to sample an input signal, a 14-bit DAC to output the calculated SQ1 feedback, two 16-bit serial DACs to output the series-array (SA) bias and cable offset, respectively. The on-board FPGA firmware provides digital filtering of the signal. The input signal, the calculated feedback, the low-pass filtered feedback signal, or a combination of these data, are transmitted over the MCE backplane (2 point-to-point LVDS lines) to the clock-card (CC) where they are rearranged and transmitted to the PC that controls the MCE.
Background
In a SCUBA2-like array of detectors, the radiation sensitive elements are TES bolometers. When voltage-biased at their superconducting transition temperature, an incoming radiation produces a change in their resistance and consequently a change of current. Each of them is inductively coupled to a first-stage of SQUID amplifiers used as low-noise amplifiers. The SQUIDs are non-linear devices that their response to the increasing input signal is approximately a sine wave. Therefore, a feedback signal is calculated based on the measured output, i.e., the change in magnetic flux in the SQUID ammeters is countered by a first-stage feedback bias arriving from the RCs of the MCE. The feedback loop is provided by a digital proportional-integral-differential (PID) flux-locked loop that calculates the correct flux to keep the whole amplification chain in a linear regime.
Each RC PID loop will be coupled to a column of up-to-41 first-stage SQUIDs (SQ1), but will only digitize the output of one SQ1 at a time. This will be achieved by using the Address Card (AC) to null the contributions from all SQUIDs in the column, except for the one that is to be sampled. The sampled SQUID will be actively biased by the AC, and multiple readings of its analog current, amplified by two further stages of SQUID amplification, will be digitized and co-added before the AC activates the next SQUID in each column. To read out the next SQUID, the AC will nullify the output of the present SQUID, and actively bias the next one.
Each PID loop will be switched from pixel-to-pixel (or more precisely row-to-row) in a column, at a line rate of approximately 800kHz set by the L/R of the cryogenic cables. During each row dwell-time, the PID loop will:
- digitize the SQUID output (SSA_SIG),
- calculate the necessary PID loop feedback value,
- filter the result,
- apply the necessary (non-filtered) first-stage feedback
For implementation details, see: [Technical Description in PDF]
Other Documentation
- Technical description [PDF]
- Readout Card firmware
- Readout Card commands
- Readout Card Preamp Chain
- ADC and DAC linearity in Readout Card
- Minimum Vcore for RC RevE
- Testing Readout Cards
