Difference between revisions of "Testing Clock Cards"

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=== Programming via Front-panel JTAG connector===
 
=== Programming via Front-panel JTAG connector===
# Load FPGA firmware using Quartus. Firmware is located at http://e-mode.phas.ubc.ca/mce_firmware/. Run auto-detect and you should see 4 devices. The part at the bottom of the list corresponts to Clock card FPGA. Load following firmware from the above directory: '''CC firmware 5.0.7''', '''BC firmware bc_v05030001_12apr2012.sof'''
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# Load FPGA firmware using Quartus. Firmware is located at http://e-mode.phas.ubc.ca/mce_firmware/. Run auto-detect and you should see list of devices. The part at the bottom of the list corresponts to Clock card FPGA and the part above it in the list is EPC16 or the "application configuration device". Right click on the row and choose a file to program. Load following firmware from the above directory: CC firmware 5.0.e, '''cc_v0500000e_15may2012.sof''' for FPGA and '''cc_v0500000e_15may2012.pof''' for EPC16. Then checkmark the program button for both devices and press start programming. The green LED should come up when programming is done.
# On the 2-slot backplane there are two sets of dip switches. You need to set the one on the Bias card side to '''1110 (0xe)''', otherwise bc1 replies do not come back, because the card is not identified properly.
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# Now make sure both cards communicate with the PC. ssh to the PC running mas and connected to the 2-slot backplane trhough fibre cables and run the following command:
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# If the tx/rx fibers are connected right, the red LED is off and the green LED is on. If the Sync Box fiber is connected and Sync Box is on, then the amber LED is also off.
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# Now make sure that the card communicates with the PC.  
 
   mce_cmd -x rb cc fw_rev
 
   mce_cmd -x rb cc fw_rev
  
 
and you will see:
 
and you will see:
   Line  0 : ok : 0x5000007
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   Line  0 : ok : 0x500000e
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 +
So far, you confirmed that FPGA is programmed correctly.
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 +
Now, proceed to programming the factory-configuration device.
  
and then type:
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=== Programming via on-board P2 JTAG connector===
  mce_cmd -x rb bc1 fw_rev
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#Now turn off the MCE,
and you will see
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#unplug the Clock Card and move the JTAG programming cable from the front-panel to the on-board P2 connector. plug the card back in and let the cable slide through the slot.
  Line  0 : ok : 0x5000005
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# Power on the MCE.
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# In Quartus, press on auto-detect and you should only see two devices listed. Choose the same pof file for EPC16.
 +
'''cc_v0500000e_15may2012.sof'''
  
 
== Testing General Features (card_all_test)==
 
== Testing General Features (card_all_test)==

Revision as of 13:00, 5 June 2013

Setup

The following equipments are needed:

  • mas PC: An ubuntu-based PC with ARC-64 PCI card installed an running mas software.
  • A fully populated 5-MDM MCE subrack with Device under test (DUT) plugged into this backplane during testing.
  • fibre-optic cable: connects mas-PC to Clock Card.
  • set of Linear supplies to power up the cards. (3V, 4.5V, 6.2V, -6.2V)
  • Altera USB programmer: attached to the JTAG connector in Clock card front panel.
  • PC with Quartus installed: used to program FPGA and configuration devices on Readout Card.
  • Sync Box with a fiber-optic cable connecting a fiber output to the sync input of the Clock Card.

If you have all the above and if your DUT has already been smoke tested, you are ready to start:

  1. Connect all the cables.
  2. unplug all cards from Subrack except Clock card unit under test, (just pull out, so they are not inserted)
  3. Power on the MCE and if the clock card is not progammed, the red led should be on.

Configuring Clock Card

The FPGA on clock card (U7) can be configured from one of the two on-board configuration devices (EPC16): A factory configuration device (U18) and an application configuration device (U17). The factory configuration is loaded upon power up and hard reset. The application configuration is loaded by issuing a command on the mas PC: wb cc config_app 1.

The FPGA and the application configuration device can be programmed through the front-panel JTAG port while the factory configuration device can be programmed from the on-board connector.

Programming via Front-panel JTAG connector

  1. Load FPGA firmware using Quartus. Firmware is located at http://e-mode.phas.ubc.ca/mce_firmware/. Run auto-detect and you should see list of devices. The part at the bottom of the list corresponts to Clock card FPGA and the part above it in the list is EPC16 or the "application configuration device". Right click on the row and choose a file to program. Load following firmware from the above directory: CC firmware 5.0.e, cc_v0500000e_15may2012.sof for FPGA and cc_v0500000e_15may2012.pof for EPC16. Then checkmark the program button for both devices and press start programming. The green LED should come up when programming is done.
  1. If the tx/rx fibers are connected right, the red LED is off and the green LED is on. If the Sync Box fiber is connected and Sync Box is on, then the amber LED is also off.
  1. Now make sure that the card communicates with the PC.
 mce_cmd -x rb cc fw_rev

and you will see:

 Line   0 : ok : 0x500000e

So far, you confirmed that FPGA is programmed correctly.

Now, proceed to programming the factory-configuration device.

Programming via on-board P2 JTAG connector

  1. Now turn off the MCE,
  2. unplug the Clock Card and move the JTAG programming cable from the front-panel to the on-board P2 connector. plug the card back in and let the cable slide through the slot.
  3. Power on the MCE.
  4. In Quartus, press on auto-detect and you should only see two devices listed. Choose the same pof file for EPC16.

cc_v0500000e_15may2012.sof

Testing General Features (card_all_test)

We run a scrip on the mas PC to issue commands over the fibre to test the Readout Card unit under test. In this script, the following circuits are tested: LEDs, silicon ID chip, slot-id and pcb-revision identification pins, FPGA and board temperature sense circuitry, LVDS communication pairs.

On mas PC, type: card_all_test

The output should look like:

 ****** Check to make sure the LEDs on the target card switched status! ****
 Unit Under Test  :  rc1
 Serial Number    :  SRC-216
 Firmware Revision:  -0xfffa
 card_id          :  0x20be502
 slot_id          :  [4]
 card_type        :  [2]
 card_rev         :  0
 fpga_temp        :  34 C pass
 card_temp        :  28 C pass
 results are in   :  /data/cryo/current_data/SRC-216_1285959943_all_test

copy the results into the test logfile and record the card_id on MCE CARD Serial-Number Lookup

Testing Serial Configuration device and FPGA reconfiguration

Load firmware into the configuration device as oppose to the FPGA now. The parallel configuration device, EPC16, is programmed through the JTAG port on the Clock-Card front panel. Here are the steps:

  • Run Quartus programmer and click on auto-detect. You should see 4 devices in the list.
  • Select EPC16 device on top and click on change file to choose cc_v05030001_12apr2012.pof (found in http://e-mode.phas.ubc.ca/mce_firmware/ )
  • Now select the device and click on program.
  • When programming is done, turn off the power and turn it back on. If the Green Light is on, it means that you have successfully programmed the configuration device.
  • on mas prompt, type: mce_cmd -x rb bc1 fw_rev and you should see the firmware revision of the firmware you loaded. This is usually noted in the filename of the file you chose.

Record the result in logfile.

log results