Test plans

Testing MCE Readout Cards

Setup

• mas PC: An ubuntu-based PC with ARC-64 PCI card installed an running mas software.
• 2-slot backplane with Clock Card plugged in: Device under test (DUT) is plugged into this backplane during testing.
• set of Linear supplies to power up the cards. (3V, 4.5V, 6.2V, -6.2V)
• Altera USB programmer: attached to the JTAG connector in Clock card front panel.
• PC with Quartus installed: used to program FPGA and configuration devices on Readout Card.

If you have all the above and if your DUT has already been smoke tested, you are ready to start:

1. connect them up an power up the 2-slot backplane.
2. Load FPGA firmware using Quartus. Firmware is located at www.phas.ubc.ca/~mce/mcedocs/firmware. When you run auto-detect, you should see 3 to 4 devices depending on the revision of the card you are testing. The part at the bottom of the list corresponts to Clock card FPGA. Load following firmware from the above directory:

CC firmware 5.0.7 RC firmware rc_stratix3_5.0.6_jan11_2010

1. On the 2-slot backplane there are two sets of dip switches. You need to set the one on the Readout card side to 1011 (0xB), otherwise rc1 replies do not come back, because the card is not identified properly.

1. Now make sure both cards communicate with the PC. ssh to the PC running mas and connected to the 2-slot backplane trhough fibre cables and run the following command:

 mce_cmd -x rb cc fw_rev

and you will see:

 Line   0 : ok : 0x5000007

and then type:

 mce_cmd -x rb rc1 fw_rev

and you will see

 Line   0 : ok : 0xffff0006

1. Testing general features

run card_all_test

2. Testing DACS (sa_bias, offset, sq1fb DACS)

In this stage, DACs are loaded with sets of fix values (0, mid-range, full-range) and then a ramp is applied and outputs are probed in all cases. Type: run rc_test

log results