Difference between revisions of "Old MCE Documents"

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(MCE Communication Protocols)
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'''<sup>&dagger;</sup>''': Note: Both Sync Box enclosures have the same PCB board inside, only the enclosure and the connectors are different. User's Guide is not yet updated for the DC-in enclosure, so all connector references are based on the rack-mount version.
 
'''<sup>&dagger;</sup>''': Note: Both Sync Box enclosures have the same PCB board inside, only the enclosure and the connectors are different. User's Guide is not yet updated for the DC-in enclosure, so all connector references are based on the rack-mount version.
 
=== MCE Communication Protocols ===
 
* MCE Communication Protocols [[http://www.phas.ubc.ca/%7Emce/mcedocs/system/SC2_ELE_S580_529_mce_protocols.pdf PDF]]
 
** Fibre Protocol between RTL PC and MCE [[http://www.phas.ubc.ca/%7Emce/mcedocs/system/fiber_and_backplane_protocols.xls XLS]]
 
** Bus Backplane Protocol [[http://www.phas.ubc.ca/%7Emce/mcedocs/system/BBISA.doc DOC]]
 
** Communication Protocol between Clock Card and Power-Supply Controller [[http://www.phas.ubc.ca/%7Emce/mcedocs/system/SPI_Comm_Interface_CC_PS.pdf PDF]]
 
** Data Rate Estimate [[http://www.phas.ubc.ca/%7Emce/mcedocs/hardware/Characteristics/mce_max_data_frame_rates.xls XLS]]
 
 
* SCUBA-2 Data-Acquisition Software Overview - Part 2 Protocols [[http://www.roe.ac.uk/ukatc/projects/scubatwo/documents/software/sc2-sof-s200-014-v4.pdf PDF]] (Nov. 04, 2005) (ATC)
 
  
 
== Design Analysis ==
 
== Design Analysis ==

Revision as of 13:55, 6 January 2012

Hardware

Description Block
Diagram
Schematics Rev. Features
Clock Card [PDF] (S581) [PDF] [PDF] B5
Readout Card [PDF] (S582) [PDF] [PDF] B9
[PDF] E0 Low-power RC
Bias Card [PDF] (S584) [PDF] [PDF] D6 Original design
[PDF] D7/8 High-current det_bias
[PDF] D11 High-current det_bias/no heater
[PDF] E0 Multiple det_bias lines
[PDF] F0 Multi det_bias & MHz-response bias lines
[PDF] F1 Low-noise bias lines turned off
[PDF] F2 Power turned off on ln_bias
[PDF] F3 Minor change in ln_bias circuit
[PDF] F4 low 1/f-noise opamp for channel 0-15; low 1/f-noise opamp for channel 15-31
Address Card [PDF] (S584) [PDF] [PDF] C4
[PDF] D0
Instrument Backplane MCEv1 5 MDM [PDF] (S587-101) [PDF] C3
[PDF] C5
Instrument Backplane MCEv2 3 MDM (C587-101) [PDF] [PDF] B
[PDF] C2
Instrument Backplane MCEv2 5 MDM (C587-201) [PDF] A
Bus Backplane MCEv1 [PDF] (S586) [PDF] [PDF] C
Bus Backplane MCEv2 (C586-101) 3 MDM [PDF] A
Bus Backplane MCEv2 (C586-201) 5 MDM [PDF] D
Filter Board MCEv1 (S587-111) [PDF] B2
Filter Board MCEv2 (C587-111) - 3 MDM [PDF] A
Filter Board MCEv2 (C587-210) - 5 MDM [PDF] A
MDM Breakout Test Board MCEv1 [XLS]
Power Supply Unit Assembly (S585) [DOC]
Power Supply Unit Board (S585-103)
[PDF] B Obsolete
Power Supply Unit Controller (S585-102)
[PDF] G8
Power Supply Unit Wiring (S585-104)
[PDF] B
Linear Feed Card [PDF]
: Not updated since early design stages.
  • Clock Card Dual-Configuration Technical Note [PDF] (SC2-ELE-S8xx-xxx) (Oct. 01, 2003)
  • FPGA Configuration Block Diagram [PDF] (SC2-ELE-S560-003)
  • Subrack Mounting Instructions [DOC] (SC2-MEC-S580-504)
  • Cryostat Mounting Test Results [PDF]

External Hardware and Accessories

Description Block
Diagram
Schematics Revision
24V Power Supply and Power Distribution [PDF] [PDF] Obsolete
24V Vicor-based Power Supply [PDF]
AC-DC Converter Unit and Power Distribution [DOC]
S588-103-101 Rectifier Board
[PDF] A
S588-104-101 Controller Board
[PDF] A
S588-105-101 Wiring
[PDF] A
Synchronizer Box [PDF] (S589) [PDF]
Rack-mount AC-in Enclosure:
Internal Wiring (S589-102)
[PDF] [PDF] A2
Cable Wiring (S589-103)
[PDF]
DC-in Enclosure:
Internal Wiring (C589-102)
[PDF] [PDF]
SDSU PCI Interface Board (San Diego State University) [PDF] 5A
Extender Card [PDF] (SC2-ELE-S565-008-003) [PDF]
Instrument Bus Tester [PDF] [PDF] C
2-slot Backplane [PDF] A
[PDF] B

: Note: Both Sync Box enclosures have the same PCB board inside, only the enclosure and the connectors are different. User's Guide is not yet updated for the DC-in enclosure, so all connector references are based on the rack-mount version.

Design Analysis

  • Monitoring Voltages/Currents of PSU [XLS]
  • Main Concerns for the MCE [PDF] (Oct. 02, 2003)
  • Address Card DAC Bus Scheme [PDF]
  • Analysis of Digital Filters for the Readout Card [PDF]
  • Data Rates for the SCUBA2 Arrays [PDF]
  • Fiber Optics Interface Analysis [PDF]
  • FPGA Asynchronous Communication [PDF]
  • Readout Card Pre-Amplifier settling time tests [PDF]
  • Bias Card Heater and Bolometer Driver Output Noise [PDF]
  • Analysis of Readout Card Amplifier Voltage and Current Noise [PDF]
  • Timing Jitter in SCUBA2 Array Readout [PDF]
  • Timing and Response to Data-Valid Pulses [PDF]

System

  • MCE Grounding Diagram [PDF] (SC2-ELE-S580-102)
  • Data Rates for the SCUBA2 Arrays [PDF]
  • Is MCE Rad tolerant? [DOC]

Design Reference Documents

  • SCUBA-2 Servo loop Analysis [PDF] (SC2-SOF-S200-049)(ATC)
  • A calculation of required noise and current swings on the SCUBA-2 MUX wafer leads. [PDF] (NIST)
  • SCUBA-2 Digitisation Scheme [PDF] (SC2-ANA-S100-041) (ATC)
  • SCUBA-2 Architectural Design [PDF] (SC2-ANA-S100-045) (ATC)
  • SCUBA-2 Data Acquisition to Data Processing Interface [PDF] (SC2-SOF-S200-008) (ATC)
  • SCUBA-2 and JCMT Secondary Mirror [PDF] (SC2-ANA-S100-039) (ATC)
  • Time-division SQUID multiplexer for Transition Edge Sensors. [PDF] (NIST)
  • A Prototype System for SQUID Multiplexing of Large Format Transition Edge Sensor Arrays. [PDF] (NIST)
  • Bias conditions of dc SQUIDs for a Time Domain SQUID Multiplexer. [PDF] (NIST)

Presentations

  • SCUBA-2 Systems Review - Multi-Channel Electronics, Hilo, June 2006 [PPT]
  • SCUBA-2 Data Acquisition Software [PPT]
  • Multi-Channel Electronics - SPIDER, Caltech, Sept. 2006 [PPT]
  • Multi-Channel Electronics - SPIDER, Caltech, May 2007 [PPT]

Real-Time Linux (RTL) PC (OBSOLETE)

  • SCUBA-2 PCI Card DSP Code Review [PDF]
  • SCUBA-2 PCI Card Diagnostics Application (SC2-ELE-S565-001) PDF]

(Old MCE docs index)