Arbitrary Waveform Generator

For running simple parameter ramps on the MCE using internal commanding, see Ramp Generator .

• The Arbitrary Waveform Generator permits users to configure a sequence of values which will be written at regular intervals to some MCE register. The AWG is an MCE firmware feature.
• A RAM block has been allocated in the Clock Card FPGA to store arbitrary waveform values.
• Commands have been implemented to read to and write from the RAM (awg_data, awg_addr).
• A FSM has been implemented that can apply a set number of values (awg_sequence_length) from the RAM block to any internal register (ramp_card_addr, ramp_param_id, ramp_step_data_num) in the MCE at a certain rate (ramp_step_period).

Script-level support: mce_awg

The script mce_awg, in combination with mce_internal_ramp, may be used to control the AWG features of the MCE.

• mce_awg is used to load the AWG data into CC RAM, and to start and stop the AWG loop.
• mce_internal_ramp is used to set the timing parameters and the target resiter for the AWG loop.

Disabling the AWG loop

To disable the AWG, run either of

mce_awg stop
mce_internal_ramp stop

Setting timing parameters and target register

The timing parameters and target register are set using mce_internal_ramp. See mce_internal_ramp, or run mce_internal_ramp -h for more details.

mce_internal_ramp --stage=sa_bias --count=8 --offset 8 --step-frequency 100  --range 0 0 0  setup

Note that the --range option is a dummy parameter here, as it is our intention to run an AWG loop, not an internal ramp.

Loading a waveform

The waveform may be taken from an ascii file, read from stdin, or generated automatically. Examples:

From a file:

mce_awg setup --filename my_weird_wave.txt 

From stdin:

cat my_weird_wave.txt | mce_awg setup --stdin

(For multi-column ascii data, from either a file or stdin, pass --column=<int> to specify the source column. In both cases, blank lines and lines beginning with a # are ignored.)

A sine wave with a period of 400 steps, amplitude 1000 and offset 20000

mce_awg setup --sine 20000 1000 --count 400

A triangle wave with a period of 8192 (max, default), from 1000 to 3000 and back again:

mce_awg setup --triangle 1000 2000

Starting the AWG loop

mce_awg start

MCE command description

• Commands:
  • internal_cmd_mode (0xB0): Enable or disable internal housekeeping/ ramping commands. Default = 0.
    • mode = 0: Disable internal commands
    • mode = 1: Enable Housekeeping commands
    • mode = 2: Enable ramp commands
    • mode = 3: Enable arbitrary waveform (AWG) commands
  • awg_sequence_length (0xB9): Specify the length of the AWG sequence that is loaded in RAM. This parameter tells the internal commanding FSM how long the AWG sequence is, and at what index it should restart AWG the sequence.
  • awg_data (0xBA): Load the AWG sequence into RAM on the Clock Card. The RAM has 8192 indexes. This may be expanded later if there are enough resources still available on the Clock Card.
  • awg_addr (0xBC): Specify the starting address for reading from or writing to the AWG RAM. This parameter does not affect the memory address of the internal commanding FSM.
  • ramp_step_period (0xB1): (also used for internal ramps) Specify the number of frame periods between each ramp step.
  • ramp_param_id (0xB5): (also used for internal ramps) Specify the parameter ID of the register to be ramped.
  • ramp_card_addr (0xB6): (also used for internal ramps) Specify the card address of the register to be ramped.
  • ramp_step_data_num (0xB7): (also used for internal ramps) Specify the number of data that are to be written per ramp command.

• Usage:

wb cc ramp_step_period 10    //This number will most likely match the data_rate, below
wb cc ramp_param_id 153      //LED, for example
wb cc ramp_card_addr 2       //Clock Card, for example
wb cc ramp_step_data_num 1
wb cc awg_sequence_length 8192  //Currently the maximum size of the AWG RAM block

wb cc internal_cmd_mode 0    //Disable internal AWG commands BEFORE writing the data!!!
wb cc awg_addr 0             //Set the AWG RAM address to zero before writing new values
wb cc awg_data 1 2 1 2 ...   //Write AWG values
wb cc awg_data 1 2 1 2 ...   //Write more AWG values, appended to the end of the first set of values
...
wb cc awg_data 1 2 1 2 ...   //Write the last few AWG values, which must number as many as specified by awg_sequence_length above

wb cc awg_addr 0             //Set the AWG RAM address to zero before reading values
rb cc awg_data 1 2 1 2 ...   //Read AWG values
rb cc awg_data 1 2 1 2 ...   
...
rb cc awg_data 1 2 1 2 ...   

wb cc awg_addr 0             //Set the AWG RAM address to zero before changing the internal command mode
wb cc internal_cmd_mode 3    //Enable internal AWG commands AFTER writing the data!!!

wb cc data_rate 10
wb cc ret_dat_s 1 1000
go cc ret_dat 1

Firmware Details

• Implementation:
  • To enable the AWG internal commands, you set internal_cmd_mode = 3, as shown in the usage, above.
  • When writing to the AWG block using the awg_data command, the AWG address pointer is incremented for every new value written, and the address pointer is not reset following the WB transaction, so that the next WB writes to the next available index in the RAM. Thus, once a series of awg_data commands have been issued to specify an entire AWG sequence, the address pointer must be set to zero manually if you wish to read back the entire sequence.
  • The awg_addr command determines the index accessed by awg_data commands, and by the internal AWG commanding state machine.
  • The awg_sequence_length command specifies the length of the AWG sequence stored in the AWG RAM. The internal AWG commanding FSM uses this parameter to determine when to wrap back to the first index of the RAM. When internal_cmd_mode is set to 3, the state machine begins issuing commands from awg_addr. The internal state machine assumes that the AWG begins at index zero of the AWG RAM, and ends at index awg_sequence_length-1. When the index reaches awg_sequence_length-1, it wraps to zero. In contrast, awg_data commands can access indexes past awg_sequence_length-1, if you read/write further.
  • The AWG value is applied immediately following a data packet, and appears in index 7 of the next data-packet header. This index is called "Ramp Value", and is also used to report the ramp value when the MCE is in internal ramp mode (internal_cmd_mode = 2)
  • The AWG commands detailed above are implemented in the Clock Card cc_v05000003_02dec2009 firmware tag available in CVS.
  • The awg_addr register and awg_data RAM are readable, but you should not read them while the Clock Card is applying an arbitrary waveform (internal_command_mode = 3) otherwise you’ll screw up the values that the internal FSM applies.