Sync Box firmware

Firmware Download Instructions!

There are an Altera CPLD (EPM570T144C3) and an Atmel micro-controller (AT89C51) on the Sync board and most times both need to be reprogrammed to upgrade the Sync Box firmware.

The CPLD firmware can be loaded using the Altera USB-Blaster that connects to the on-board P23 JTAG header. A *.pof file needs to be loaded.

The micro-controller firmware can be loaded using a USB cable that connects to the on-board J1 connector. A *.hex file needs to be loaded.

For more details, see:

Firmware .sof & .pof Downloads

Firmware set Rev. 1f

Filename

sync_box_v1f_25feb2010.pof

sync_box_v1f_25feb2010.hex

Features

adds a ckd command to the rs232 interface to adjust the frequency of DV_Spare1 and DV_Spare2 by setting a 50MHz divisor through the command.

when you turn on the sync box, the firmware revision 1f appears on the rs232 terminal

Firmware set Rev. 1e (6e?)

Filename

sync_box_v6e_11aug2008.pof

sync_box_v1c_17nov2006.hex

Features

added a 50MHz clock on SMA output of the Sync box

Note

Since the microcontroller code is still 1c and that is what is reported in rs232 terminal, there is no way to identify this set from a 1c set.

Firmware set Rev. 1c

Filename

sync_box_v6c_19oct2006.pof

sync_box_v1c_17nov2006.hex

Features

original firmware