Maximum Length Sequence Commands

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Revision as of 13:36, 13 January 2010 by Bburger (talk | contribs) (Commands and Usage)

Determining the complex impedance of SQUIDS is difficult to do, because it requires overlaying a pattern on top a normal bias value to help differentiate between optical noise and electrical noise.

Commands and Usage

In an effort to determine the complex impedance, the following commands have been implemented.

  • Commands:
    • mls_sequence_len: Specify the length of the MLS sequence that is loaded in RAM. This parameter tells the internal commanding FSM how long the MLS sequence is, and at what index it should restart MLS the sequence.
    • mls_data: Load the MLS sequence into RAM on the Clock Card. The RAM has 8192 indexes. This may be expanded later if there are enough resources still available on the Clock Card.
    • mls_addr: Specify the starting address for reading from or writing to the MLS RAM. This parameter does not affect the memory address of the internal commanding FSM.
    • ramp_step_period: (also used for internal ramps) Specify the number of frame periods between each ramp step.
    • ramp_param_id: (also used for internal ramps) Specify the parameter ID of the register to be ramped.
    • ramp_card_addr: (also used for internal ramps) Specify the card address of the register to be ramped.
    • ramp_step_data_num: (also used for internal ramps) Specify the number of data that are to be written per ramp command.
  • Usage:
wb cc internal_cmd_mode 3    //Enable internal MLS commands
wb cc ramp_step_period 10    //This number will most likely match the data_rate, below
wb cc ramp_param_id 153      //LED, for example
wb cc ramp_card_addr 2       //Clock Card, for example
wb cc ramp_step_data_num 1
wb cc mls_sequence_len 8192  //Currently the maximum size of the MLS RAM block

wb cc mls_addr 0             //Set the MLS RAM address to zero before writing new values
wb cc mls_data 1 2 1 2 ...   //Write MLS values
wb cc mls_data 1 2 1 2 ...   //Write more MLS values, appended to the end of the first set of values
...
wb cc mls_data 1 2 1 2 ...   //Write the last few MLS values, which must in total number mls_sequence_len above

wb cc data_rate 10
wb cc ret_dat_s 1 1000
go cc ret_dat 1

Firmware Details

  • To enable the MLS internal commands, you set internal_cmd_mode = 3, as shown in the usage, above.
  • When writing to the MLS block using the mls_data command, the MLS address pointer is incremented for every new value written, but the address pointer is not reset following the WB, so that the next WB writes to the next available index in the RAM. Thus, once a series of mls_data commands have been issued to specify an entire MLS sequence, the address pointer must be reset to zero if one wishes to read back the entire sequence.
  • The mls_addr command has no bearing on the first index accessed by the internal MLS commanding state machine. The internal state machine assumes that the MLS begins at index zero of the MLS RAM, and ends at index mls_sequence_len-1. When internal_cmd_mode is set to 3, the state machine begins issuing commands using the value stored at index zero of the MLS RAM.
  • The MLS value is applied immediately following a data packet, and appears in index 7 of the next data-packet header. This index is called "Ramp Value", and is also used to report the ramp value when the MCE is in internal ramp mode (internal_cmd_mode = 2)
  • The MLS commands detailed above are implemented in the Clock Card cc_v05000003_02dec2009 firmware tag available in CVS.
  • At this point in time (13 Jan 2009), the feature has not been testing in hardware -- although the simulations look clean