Digital 4-pole Butterworth Low-pass filter

A digital 4-pole Butterworth low-pass filter is implemented as 2 cascaded biquads (2-pole topology) in the Read-out card firmware of the MCE. Each biquad has the following functional form:

H_i(Z) = [1 + 2 x Z ^-1 + Z ^-2] / [1 + b_1i x Z ^-1 + b_2i x Z ^-2]

and the overall transfer function is: H(Z) = k * H₁(Z) * H₂(Z) where k is the gain.

Filter Specification

Filter specification of the 4-pole Butterworth filter is determined by the filter coefficients b₁₁, b₁₂, b₂₁, b₂₂. These coefficients are currently hard-coded in the Readout-card firmware and depending on the firmware revision, the filter specification may vary.

Assume:

f_3dB is the frequency at which the signal is <math>\sqrt2</math> of its maximum value and

f_samp is the sampling frequency calculated as 50MHz/(num_rows * row_len). For example 50MHz(100*33)=15151.5Hz.

Note that the filter f_3dB scales if f_samp changes.

Type 1

(supported in all rc except 5.0.7)

DC amplification = 1217.9148

f_3dB / f_samp = 122.226Hz / 15151Hz

Gain @ 200Hz=0.14189148 (wrt the DC gain)

Type 2

(supported in rc version 5.0.7)

DC amplification = 2044

f_3dB / f_samp = 75Hz / 30000Hz

Type 256

Work in Progress: Filter coefficients b11, b12, b21, b22 are parametrized and programmable by software.

The following plot shows the magnitude and the phase of Type 1 filter.

Here is Elia's original plot Media:BW_filter.ps. Then we see the same plot with the impulse-response also added (by Joe, Nov 29, 2007):

IDL Code

In this little IDL program you can find the functional form as a function of the frequency of the filter. First, Elia's original program, then as modified by Joe on November 29, 2007.

Media: filter_pro.txt

Media: filter_pro2.txt

Filter Coefficients

The filter coefficients are generated using fdatool (filter-design & Analysis tool) in Matlab/Simulink. Once you launch the fdatool, choose the following settings:

• Response Type: Low Pass

• Design Method: Butterworth

• Filter Order: 4

• Frequency Specifications:
  • For Type 1: F_s = 12195 = (50000/100*41), F_c=100
  • For Type 2: F_s = 30000 = (50000/100*41), F_c=75
  • (The attenuation at F_c is fixed at 3dB (half the passband power))

Then click on Design Filter and you will get the following coefficients:

Type 1

Section 1:

Numerator: 1 2 1

Denominator: 1 -1.9587428340882587 0.96134553442399129

Gain = 1/k₁ = 0.00065067508393319923 (not implemented)

Section 2:

Numerator: 1 2 1

Denominator: 1 -1.9066292518523014 0.90916270571237567

Gain = 1/k₂= 0.00063336346501859835 (not implemented)

Type 2

Section 1:

Numerator: 1 2 1

Denominator: 1 -1.9711486088510415 0.97139181456687917

Section 2:

Numerator: 1 2 1

Denominator: 1 -1.9878047097960421 0.98804997058724808

Gain = 1/(k₁ * k₂)= 0.0000000037280516432624239 (not implemented)

The following ONLY concerns the MCE firmware developers:
Now to include these floating numbers (coefficients) in MCE firmware, you need to convert the coefficients to signed binary fractional (SBF) 1.14 format where the right-most bit is the sign and the rest of the bits are the magnitude. For example, to convert b11=-1.9587428340882587, you multiply it by -2¹⁴ and convert it to hex, it becomes 0x7D5C. Then the binary is 111 1101 0101 1100.

These values are then plugged in fsfb_calc_pack.vhd (FILTER_B11_COEF, FILTER_B12_COEF, FILTER_B21_COEFF, FILTER_B22_COEFF).

Calculating the Filter Gain (k)

Note that in firmware, instead of k₁ and k₂, an inter-biquad gain of k₃ (implemented as a binary shift) and k₄, representing number of bits dropped after the second biquad, are implemented.

Hence, the overall gain becomes (k₁ x k₂) / (k₃ x k₄).

(Note for firmware developers: see FILTER_GAIN_WIDTH and FILTER_SCALE_LSB in fsfb_calc_pack.vhd.)

Type 1

k3 is 2¹¹, the filter gain is estimated at 1184, but vhdl simulation results in a gain of 1216.

Type 2

k3 is 2¹⁴ and k4 is 2³, the filter gain is estimated at 2046, but vhdl simulation results in a gain of ????.

The gain difference can be attributed to the coefficient quantization effects.