Readout Card firmware
From MCEWiki
Contents
Stable Firmware Revisions
- 4.0.6 for normal operation
- 4.3.7 for 50MHz data acquistion
4.3.7
- Filename : rc_v04030007_26may2008_raw.sof
- Feautres
- 14-bit raw mode enabled to buffer a snapshot of 50MHz samples for 2 frames of row_len * num_rows samples.
- In order to save RAM for raw mode, two memory-intensive features are disabled:
- low-pass filter disabled ( mixed filtfb data modes 6, 7, 9 are also disabled)
- PID (gainp0, gaini0, gaind0) readback disabled. one can still set PID values and run servo, but can not read back the values.
- Note
- This is based on 4.2.7 and not tagged yet due to cvs2svn migration. list of mods:
raw_dat_banks.vhd, adc_sample_coadd_pack.vhd, fsfb_fltr_regs.vhd, adc_sample_coadd.vhd, wbs_frame_data.vhd, misc_banks_admin.vhd, pidram_admin.vhd.
4.2.7
- Filename : rc_v04020007_24may2008_raw.sof
- Feautres
- raw mode enabled to buffer a snapshot of 50MHz samples for 2 frames of row_len * num_rows samples.
- In order to save RAM for raw mode, two memory-intensive features are disabled:
- low-pass filter disabled ( mixed filtfb data modes 6, 7, 9 are also disabled)
- PID (gainp0, gaini0, gaind0) readback disabled. one can still set PID values and run servo, but can not read back the values.
- Bug fix
- the bug associated with reading from raw-buffer is fixed.
- Note
- This is based on 4.1.7 and not tagged yet due to cvs2svn migration. list of mods:
fsfb_fltr_regs.vhd, adc_sample_coadd.vhd, wbs_frame_data.vhd, misc_banks_admin.vhd, pidram_admin.vhd.
4.1.7
- Filename : rc_v04010007_25apr2008_raw.sof
- Feautres
- raw mode enabled to buffer a snapshot of 50MHz samples for 2 frames of row_len * num_rows samples.
- In order to save RAM for raw mode, two memory-intensive features are disabled:
- low-pass filter disabled ( mixed filtfb data modes 6, 7, 9 are also disabled)
- PID (gainp0, gaini0, gaind0) readback disabled. one can still set PID values and run servo, but can not read back the values.
- Bugs
- after each readout frame, raw-buffer readout counter falls behind by 3 and this causes skipping 3 50MHz samples in the data stream and column-data being messed up in subsequent frames. Data can be rearranged by post processing.
- Note
- This is based on 4.0.6 and not tagged yet due to cvs2svn migration. list of mods:
fsfb_fltr_regs.vhd, adc_sample_coadd.vhd, wbs_frame_data.vhd, misc_banks_admin.vhd, pidram_admin.vhd.
4.0.6
- Filename : rc_v04000006_15feb2008.sof or .pof
- Feautres
- bugfix: unreliable reset due to unsafe and incomplete state machines is fixed.
- bugfix: flux_jump sign problem fixed, so far proved in const_mode, to be tested in servo_mode with cold setup.
- servo_mode=2 or ramp previously only went from 0 to ramp_amp, but now goes from -8192 to -8192+ramp_amp
- new commands are added: scratch and card_type. Scratch takes 8 values and can be used by software to detect reset.
- slot_id and fw_rev are now integrated as part of all_cards.vhd
- lvds_tx_b=0, This will allow Clock Card to use the secondary backplane lvds line and check whether RC is plugged in.
- filter_coeff in misc_banks_admin commented as it is not implemented and causes timing problems.
- Bugs
- reading gainp/gaini/gaind right after power up hangs the reply datapath to CC. resetmce clears this error as temporary solution. the problem is caused by first read ack of pid_ram_admin.
- slot_id is only set after a resetmce is issued. (using the latest all_cards in the next revision will fix this)
4.0.5
- Filename : rc_v04000005_01nov2007.sof or .pof
- Feautres
- data mode 9 (mixed filt + flux jump) with windowing readjusted compared to data mode 8
- Bugs
- unreliable resetmce. Sometimes, firmware waked up non-responsive on lvds lines.
- In data mode 5 and 9, flux-jump counter is not reported properly due to a sign error. However, flux jumping works fine.
3.0.19
- Filename : rc_v03000019_16feb2007_raw.sof (no pof as one is not likely to run with this as regular firmware)
- Feautres
- data mode 3 is enabled.
- filter is disabled as a compromise to fit the raw-mode buffer.
- Bugs
- unreliable resetmce. Sometimes, firmware waked up non-responsive on lvds lines.
Old versions
- 4.0.4 rc_v04000004_11oct2007.sof data mode 8 added (mixed filt + flux jump)
- 4.0.3 rc_v04000003_19sep2007.sof data mode 7 bit split readjusted to 10b error being bit 4 to 14
- 4.0.2 rc_v04000002_11sep2007.sof pid resolution increased to 10b, data mode 7 added
- 4.0.1 rc_v04000001_06sep2007.sof
- 4.0.0 rc_v04000000_29aug2007.sof supports readout_row_index * bugs
to-do list
- bug : After power up, first readout from gainp/gaini/gaind parameters hangs the wishbone unless a reset is issued.
- reduce co-add storage from 32b wide to 24b (14b adc + 10b (for coadding upto 1024 samples))
- reduce the width for pid calculations
- update sa_bias/offset once when written to as oppose to reload every frame
