Difference between revisions of "MCE hardware"
From MCEWiki
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** How we route them to the MDM connectors is limited but we have a few options, what seems to be best to me is | ** How we route them to the MDM connectors is limited but we have a few options, what seems to be best to me is | ||
*** P2 gets LN_BIAS_00 to 08 | *** P2 gets LN_BIAS_00 to 08 | ||
| − | *** P3 gets LN_BIAS_09 to 15 ( | + | *** P3 gets LN_BIAS_09 to 15 (P3 also has DET_BIAS_ORG and PXL_HTR) |
| − | *** P4 gets LN_BIAS_16 to 23 with 1 spare signal | + | *** P4 gets LN_BIAS_16 to 23 with 1 spare signal (pair) |
| − | *** P5 gets LN_BIAS_24 to 29 with 3 spare signal | + | *** P5 gets LN_BIAS_24 to 29 with 3 spare signal (pair) |
Revision as of 09:39, 10 July 2008
MCEv2 5-MDM design notes
- Jumpers
- Jumpers for signal pairs have reference designators of JPn and JNn (eg. JP1 and JN1 are signal pair jumpers)
- These jumpers are called out on the BOM as zero ohm resistors or DNP (do not populate) parts
- Zero ohm resistors will not be used for connect ground planes, copper traces will be used
- MDM routing of low-noise bias lines
How to divide up the Low Noise Bias Signals between the new Bias Cards.
- We need to maintain compatibility with existing Bias Cards which should ground these new backplane signal lines.
- Maximizing the number of Low Noise Bias Signals we could get 10 on each of BC1-BC3 for a total of 30.
- How we route them to the MDM connectors is limited but we have a few options, what seems to be best to me is
- P2 gets LN_BIAS_00 to 08
- P3 gets LN_BIAS_09 to 15 (P3 also has DET_BIAS_ORG and PXL_HTR)
- P4 gets LN_BIAS_16 to 23 with 1 spare signal (pair)
- P5 gets LN_BIAS_24 to 29 with 3 spare signal (pair)
