Difference between revisions of "Sync Box DC-in io"
From MCEWiki
| Line 69: | Line 69: | ||
| *[http://www.ti.com/lit/ds/symlink/sn75179b.pdf Differential Driver/Receiver pair SN75179B] | *[http://www.ti.com/lit/ds/symlink/sn75179b.pdf Differential Driver/Receiver pair SN75179B] | ||
| − | [[Category: | + | [[Category:Sync Box]] | 
Revision as of 17:59, 31 August 2016
- MCE0 to MCE7
- 8 Fibre outputs. Carries a 50 MHz Manchester-encoded signal containing data packets, which include incremented sequence numbers. Programmable as two sets of 4 outputs with differently spaced data packets on each.
- RS232 Command IO
- DB9 connector (CJ2), TTL input and output, used to command the Sync Box from a PC using a regular RS232 cable.
- TTL-IN
- BNC connector (CJ5), TTL input, spare input to the FPGA. ***Not currently used, and open for suggestions.
- TTL-OUT
- BNC connector (CJ6), TTL output. Carries a 50 MHz clock signal.
- Power
- Circular connector (CP1), 5V input.
Interface Connector: CJ3
A DB25 connector that provides the following auxiliary input/outputs:
- DATA_VALID
- Differential RS485 input. Detects falling edges from a Real-Time Sequencer (implemented by SCUBA2) which tells the Sync box when to tell the MCE's to collect data.
- DATA_SYNC1 (formerly DV_SPARE1)
- differential RS485 output. Carries a 5 MHz clock signal that is synchronous with DATA_SYNC2. (WARNING: signal polarity may be swapped)
- DATA_SYNC2 (formerly DV_SPARE2)
- differential RS485 output. Carries a 5 MHz data signal that is synchronized with DATA_SYNC1, and contains the same frame sequence numbers as the MCE(0-7) outputs. NOTE: This output only contains the DV info stream (40-bit), but not the occurrences of Addr_Return-to-Zero between DVs. (WARNING: signal polarity may be swapped)
- DATA_SYNC3
- output, available both as TTL and differential RS485, asserted for 1us on an Address-Return-to-Zero(ARZ) if a DV pulse is detected since the last ARZ.
- DATA_SYNC4
- output, available both as TTL and differential RS485, asserted for 1us on an Address-Return-to-Zero(ARZ) if a DV pulse is detected since the last ARZ.
Pinout
| Pin | Signal | Pin | Signal | 
|---|---|---|---|
| 1 | Data_Valid+ | 14 | GND | 
| 2 | Data_Valid- | 15 | Data_Sync1+ | 
| 3 | GND | 16 | Data_Sync1- | 
| 4 | Data_Sync2+ | 17 | GND | 
| 5 | Data_Sync2- | 18 | Data_Sync3+ | 
| 6 | GND | 19 | Data_Sync3- | 
| 7 | Data_Sync3_TTL | 20 | GND | 
| 8 | GND | 21 | Data_Sync4+ | 
| 9 | Data_Sync4_TTL | 22 | Data_Sync4- | 
| 10 | N/C | 23 | GND | 
| 11 | N/C | 24 | N/C | 
| 12 | N/C | 25 | N/C | 
| 13 | N/C | 
Schematics
Notes
Here are examples of RS485 driver/receiver chips:
