Difference between revisions of "Readout Card RevB to RevE changes"

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: Rev. E cards consume about 13.4W while Rev. B cards consume about 25W. This is mainly due to using a serial 8 in 1 ADC along with a Stratix III FPGA.
 
: Rev. E cards consume about 13.4W while Rev. B cards consume about 25W. This is mainly due to using a serial 8 in 1 ADC along with a Stratix III FPGA.
 
; Preamp chain
 
; Preamp chain
: The noise bandwidth of the preamp is adjusted to about 2MHz in Rev. E while it was about 6.6MHz in Rev. B cards. See [[ ]]
+
: The noise bandwidth of the preamp is adjusted to about 2MHz in Rev. E while it was about 6.6MHz in Rev. B cards. Rev. F uses different opamps as well as different RC poles. See [[ ]]
 
; Minimum Vcore  
 
; Minimum Vcore  
 
: The minimum voltage level for Vcore is 3V for Rev. E cards while it was 2.5V for Rev. B cards.
 
: The minimum voltage level for Vcore is 3V for Rev. E cards while it was 2.5V for Rev. B cards.
Line 14: Line 14:
 
; SEU tolerance
 
; SEU tolerance
 
: The Stratix III FPGA in Rev. E has a CRC_ERROR pin that can be used to reconfigure the FPGA in case of an SEU hit on the FPGA configuration bits. This is not available on Rev. D. The option needs to yet be supported in firmware and software.
 
: The Stratix III FPGA in Rev. E has a CRC_ERROR pin that can be used to reconfigure the FPGA in case of an SEU hit on the FPGA configuration bits. This is not available on Rev. D. The option needs to yet be supported in firmware and software.
 +
 +
; hard-wired pcb revision
 +
: In Rev. E, 4 pins are introduced to provide the ability of reading back the pcb revision by software. These 4 bits are reported in the upper 16 bits of card_type. e.g., in a *.run file:
 +
: RB rc2 card_type 00001282
 +
: translates to 0x502 or rc2 card_type 2 pcb_rev 5
 +
: card_type reads 00000002 for cards prior to Rev. E.
  
 
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[[ Board Revision Summary | back to MCE Card Revision Listing]]
 
[[ Board Revision Summary | back to MCE Card Revision Listing]]

Revision as of 16:20, 1 February 2011

Lower power
Rev. E cards consume about 13.4W while Rev. B cards consume about 25W. This is mainly due to using a serial 8 in 1 ADC along with a Stratix III FPGA.
Preamp chain
The noise bandwidth of the preamp is adjusted to about 2MHz in Rev. E while it was about 6.6MHz in Rev. B cards. Rev. F uses different opamps as well as different RC poles. See [[ ]]
Minimum Vcore
The minimum voltage level for Vcore is 3V for Rev. E cards while it was 2.5V for Rev. B cards.
8 in 1 serial ADC
An 8-channel 14-bit 50MS/s serial ADC (AD9252BCPZ-50) is used in Rev. F cards while a single channel 14-bit 50MS/s parallel ADC (AD6644AST) is used in Rev. D cards. The serial ADC accounts for most of the power saving.
Stratix III series FPGA
EP3SE50
A pin compatible bigger FPGA with more resources, i.e., memory, DSP multipliers, is used in Rev. E as oppose to Stratix I series FPGA in Rev. B.
FPGA configuration Device
A serial configuration device (EPCS64) is used in Rev. E compare to a parallel configuration device (EPC16) in Rev. B. This accounts to some power savings.
A *.jic file is needed to load permanent firmware on Rev. E cards as oppose to *.pof files for Rev. B cards.
SEU tolerance
The Stratix III FPGA in Rev. E has a CRC_ERROR pin that can be used to reconfigure the FPGA in case of an SEU hit on the FPGA configuration bits. This is not available on Rev. D. The option needs to yet be supported in firmware and software.
hard-wired pcb revision
In Rev. E, 4 pins are introduced to provide the ability of reading back the pcb revision by software. These 4 bits are reported in the upper 16 bits of card_type. e.g., in a *.run file:
RB rc2 card_type 00001282
translates to 0x502 or rc2 card_type 2 pcb_rev 5
card_type reads 00000002 for cards prior to Rev. E.

back to MCE Card Revision Listing